A Review of Memory Circuit Design Trend in Nanotechnology
Yogesh N. Thakre1, Shubhada S. Thakare2, Devendra S. Chaudhari3
1Yogesh N. Thakre, Department of Electronics and Telecommunication, Government College of Engineering, Amravati, India.
2Shubhada S. Thakare, Department of Electronics and Telecommunication, Government College of Engineering, Amravati, India.
3Dr. Devendra S. Chaudhari, Department of Electronics and Telecommunication, Government College of Engineering, Amravati, India
Manuscript received on March 11, 2013. | Revised Manuscript Received on March 12, 2013. | Manuscript published on March 25, 2013. | PP: 7-10 | Volume-1 Issue-5, March 2013. | Retrieval Number: E0201031513/2013©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: DRAM is type of volatile memory. Nowadays semiconductor memory is capable to store large data in small area. In past SRAM is more preferable as compared to DRAM because of its high speed operation, large noise margin and logic compatibility. However, due to its large cell area and high power consumption, SRAM has limitations when expanding the array size beyond a certain level in process variation. This paper reviews the history of RAM from SRAM to DRAM. It also suggests the day by day DRAM is more preferable as compare to SRAM because of cell area decreases as number of transistor decreases from SRAM to DRAM design.
Keywords: Cell, Cell area, Dynamic RAM (DRAM), Static RAM (SRAM), 3T-1D (Three transistor- one diode), etc.